Composite Design Engineer

Join Tenstorrent as a Physical Design Engineer, where you will be at the forefront of cutting-edge semiconductor design. This role will involve working collaboratively with cross-functional teams to develop robust and efficient physical designs, ensuring optimal performance and manufacturability of our next-generation products.

Wehrtyou is seeking a Physical Design Engineer to develop advanced physical layouts for semiconductor products. This role directly shapes hardware design and implementation, balancing high performance with manufacturability. Key responsibilities Create and refine physical layouts for semiconductor devices Collaborate with multidisciplinary teams to optimize designs Ensure layouts comply with industry standards for quality and reliability Support product delivery from initial concept through manufacturing Locations Austin, TX, United States Boulder, Colorado, United States Chicago, Illinois, United States London, United Kingdom New York, NY, United States Seattle, Washington, United States Work culture Engineers at Wehrtyou contribute to projects that help shape the future of technology. The team emphasizes collaboration, technical growth, and practical problem-solving.

Neuralink develops devices that connect directly with the human brain. The company’s technology focuses on restoring movement for people with paralysis, improving vision for those with impairments, and changing how people interact with digital systems. The Brain Interfaces Hardware Department leads the design of chip architecture and silicon systems for neural recording and stimulation. This group works on system-on-chip (SoC) solutions that support high-bandwidth brain-machine interfaces. Team members include engineers committed to advancing neurotechnology. Role overview The Physical Design and Verification Engineer manages the full physical design flow from RTL to GDSII. This includes: Synthesis Placement Clock tree synthesis Detailed routing Optimization Physical signoff verification Locations This position is based in Austin, Texas or Fremont, California.

About Etched Etched builds the first AI inference system tailored for transformers, delivering over 10x higher performance with lower cost and latency than conventional approaches. The company’s ASIC technology powers advanced products, from real-time video generation to sophisticated reasoning agents. Backed by leading investors and staffed by top engineers, Etched is focused on reshaping the infrastructure that supports the fast-moving AI sector. Role Overview The Senior Physical Design Engineer will play a central role in block-level implementation and verification. This position focuses on driving timing closure and optimizing power, performance, and area (PPA). The engineer will oversee third-party design partners and help refine internal workflows to accelerate design cycles. What You Will Do Develop a deep understanding of physical design challenges and solutions Run physical design flows to achieve block closure, improve ASIC infrastructure, and automate design steps Work closely with RTL designers, offering feedback to improve PPA Create dashboards to monitor project convergence in physical design Refine tool flows and collaborate with EDA vendors to adopt new technologies Take responsibility for achieving block-level closure Manage relationships with third-party physical design service providers Who We’re Looking For 5 to 10+ years of hands-on experience in physical design Strong background in tools, flows, and methodologies from RTL synthesis through GDSII sign-off Proven track record in back-end design and timing closure on advanced nodes (5nm and below) Familiarity with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL-to-GDSII flows Experience using sign-off tools such as PrimeTime, Tempus, Voltus, and similar Knowledge of UPF-based low power design, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis Creative thinker with strong problem-solving skills Location Austin

Join our innovative team as an ASIC Physical Design Engineer in the vibrant city of Austin, Texas. In this role, you will leverage your expertise to design and implement cutting-edge ASIC physical layouts, ensuring high performance and reliability.As a key member of our engineering department, you'll collaborate with cross-functional teams to drive projects from conception through to completion, all while adhering to strict timelines and quality standards.

At Tenstorrent, we are pioneering advancements in AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI transforms the computing landscape, our solutions are designed to integrate innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team of technologists has built a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a commitment to developing an exceptional AI platform. We prioritize collaboration, curiosity, and a dedication to tackling challenging problems. As we expand our team, we invite contributors of all experience levels to join us.We are looking for skilled Physical Design Engineers to develop high-performance blocks for our state-of-the-art CPU and AI/ML architectures. In this role, you'll manage the entire implementation process from synthesis to tapeout, collaborating with leading engineers to push the limits of performance, power, and area. If you are passionate about designing silicon that drives the future of AI computing and enjoy solving intricate design challenges, we would love to have you as part of our team.This position is hybrid, based in Austin, TX, Santa Clara, CA, or Fort Collins, CO.We welcome applicants with diverse experience levels. During the interview process, we will evaluate candidates to align offers with their respective skill levels, which may differ from the one stated in this posting.

Join Tenstorrent as an AI/ML Physical Design Flow Engineer and contribute to our cutting-edge projects that leverage artificial intelligence and machine learning in physical design processes. You will work closely with a talented team to develop and optimize design flows, ensuring efficiency and high performance in our systems.

Join Stanley Consultants, an esteemed global consulting engineering firm recognized for its commitment to culture, ethics, and client satisfaction. We tackle complex challenges to foster a sustainable and interconnected world while adapting to technological advancements and resilient practices.With over a century of experience across energy, federal government, transportation, and water sectors, we are shaping the infrastructure that enhances lives. As an employee-owned organization, we prioritize a "People First" approach, valuing your voice, growth, and success.We provide flexible work arrangements, competitive compensation, comprehensive benefits, and the opportunity to build a fulfilling, long-term career.

At Tenstorrent, we are at the forefront of revolutionary AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI reshapes the computing landscape, our solutions adapt to integrate innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team has engineered a high-performance RISC-V CPU from the ground up, driven by a passion for AI and a commitment to developing the premier AI platform. We foster a culture of collaboration, curiosity, and a relentless pursuit of solving complex challenges. We are expanding our team and are eager to welcome contributors of all experience levels.We are currently seeking a Senior Staff Physical Design Engineer specializing in EMIR to join our silicon team. In this pivotal role, you will spearhead electromigration (EM) and IR-drop simulations, ensuring resilient power delivery, signal integrity, and long-lasting reliability for high-performance integrated circuits (ICs). Collaborating closely with RTL, physical design, and analysis teams, you will execute power grid strategies that enhance performance, power efficiency, and area (PPA), especially at advanced nodes such as 7nm and below. Your expertise will also support EMIR sign-off and waiver methodologies across the chip hierarchy.This is a hybrid position based out of either Austin, TX or Santa Clara, CA.We encourage candidates from various experience backgrounds to apply. During the interview process, we will assess candidates for the appropriate level, and our offers will be aligned accordingly, which may differ from this posting.

At Tenstorrent, we are at the forefront of AI technology, transforming performance benchmarks, usability, and cost-effectiveness in the industry. As AI reshapes the computing landscape, our solutions are designed to integrate innovations across software models, compilers, platforms, networking, and semiconductors. With a passionate team of technologists, we have engineered a high-performance RISC-V CPU from the ground up, driven by our enthusiasm for AI and our commitment to creating the premier AI platform. We prioritize collaboration, curiosity, and a relentless pursuit of challenging problems. Join us as we expand our team and welcome contributors of all experience levels.We are currently on the lookout for a SoC Physical Design Verification Engineer who will take charge of full-chip signoff and guarantee the manufacturability and high quality of silicon across advanced technology nodes. In this role, you'll spearhead physical verification closures (DRC, LVS, ERC, etc.), troubleshoot issues using standard industry PV tools, and work alongside RTL, PD, CAD, and packaging teams to ensure successful tapeouts. If you thrive in a dynamic environment and relish tackling intricate challenges in cutting-edge silicon, we want to hear from you.This position is hybrid, based in Santa Clara, CA; Austin, TX; or Fort Collins, CO.We invite applicants of various experience levels for this role. During the interview process, we will assess candidates for the appropriate level, and offers will be made accordingly, which may differ from the one in this posting.

At Tenstorrent, we are at the forefront of pioneering AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI reshapes the computing landscape, our solutions must adapt to integrate advances in software modeling, compilers, platforms, networking, and semiconductors. Our diverse group of technologists has successfully crafted a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a relentless pursuit to create the finest AI platform. We cherish collaboration, curiosity, and a steadfast commitment to tackling complex challenges. As we expand our team, we invite contributors at all experience levels to join us.We are currently seeking a Timing Engineer to enhance our silicon team. In this pivotal role, you will spearhead static timing analysis and closure for intricate, high-performance designs. You will work in close partnership with logic, DFT, and physical design teams to troubleshoot constraints, optimize timing paths, and ensure our chips meet performance objectives across various corners and modes.This position is hybrid, based in Austin, TX, Fort Collins, CO, or Santa Clara, CA.We encourage candidates of all experience levels to apply. Throughout the interview process, candidates will be evaluated for their fit, and offers will correspond to the assessed level, which may differ from the one stated in this posting.

Join Tenstorrent as a Full-Chip Physical Design Verification Engineer, where you will play a pivotal role in ensuring the integrity and performance of our cutting-edge semiconductor designs. You will collaborate closely with cross-functional teams to validate full-chip designs, enhancing their functionality, reliability, and efficiency.Your expertise will be crucial in developing and executing verification plans, identifying and resolving issues, and contributing to the advancement of our innovative technology. If you are driven by a passion for excellence and are eager to work in a dynamic environment, we want to hear from you!

At Tenstorrent, we are at the forefront of pioneering AI technology, challenging the norms of performance, usability, and cost-effectiveness. As AI reshapes the landscape of computing, we are committed to evolving our solutions to integrate advancements in software models, compilers, platforms, networking, and semiconductor technologies. Our dynamic team has successfully built a high-performance RISC-V CPU from the ground up, fueled by a collective passion for AI and a relentless drive to create the ultimate AI platform. We cherish collaboration, curiosity, and a strong commitment to tackling complex challenges. As we expand our team, we welcome contributors across all experience levels.We are currently on the lookout for a Physical Design Engineer to take charge of timing for subsystems within our AI accelerator chip. In this role, you will work closely with RTL designers during the design exploration phase to evaluate the feasibility and performance, power, and area (PPA) of micro-architectural features. Your tasks will involve developing timing constraints and guiding the transition to physical design implementation. Key responsibilities include synthesis, place and route, timing analysis and closure, and power optimization. With a wide design space available for AI accelerators, your contributions will be crucial in selecting micro-architecture design points that align with die-size and PPA objectives.This position offers a hybrid work environment, with options based in Austin, TX, Santa Clara, CA, or Fort Collins, CO.We invite candidates of all experience levels to apply. During the interview process, we will assess each candidate's fit for the appropriate level, and compensation will correspond accordingly, which may differ from the level indicated in this posting.

At Tenstorrent, we are at the forefront of pioneering AI technology, setting new standards for performance, user experience, and cost efficiency. As AI transforms the computing landscape, our solutions are evolving to integrate advanced software models, compilers, platforms, networking, and semiconductor innovations. Our dynamic team of technologists has engineered a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a dedication to creating the best AI platform available. We prioritize teamwork, inquisitiveness, and a relentless pursuit of tackling challenging problems. We are expanding our team and are eager for contributors of all experience levels to join us.We are searching for an outstanding Senior SoC Physical Design Engineer to lead the top-level implementation of our intricate AI and CPU SoC designs. In this role, you will facilitate cross-disciplinary collaboration, crafting advanced floorplans, power grids, and clock networks, while ensuring design closure at the chip level. If you possess a talent for navigating the complexities of full-chip physical design and aspire to deliver next-generation AI hardware, your expertise is needed here.This position is hybrid, with work based out of Santa Clara, CA; Austin, TX; or Fort Collins, CO.We encourage applications from candidates of varying experience levels. During the interview process, we will assess candidates for the appropriate seniority level, and compensation will reflect that level, which may differ from what is stated in this posting.

Join our innovative team at Braze as a Lead Design Engineer, where you'll play a crucial role in shaping our product's design and functionality. Your expertise will guide the design process, ensuring that our solutions are not only functional but also aesthetically pleasing and user-friendly. You will collaborate with cross-functional teams, utilizing your technical skills to lead design projects from concept to completion.

Saronic Technologies is at the forefront of transforming maritime autonomy, committed to pioneering advanced solutions that enhance operational efficiency through cutting-edge autonomous platforms.Job Overview:We are looking for an exceptionally talented Physical Security Systems Engineer to oversee the design, implementation, integration, and lifecycle management of our enterprise physical security technologies. In this pivotal role, you will contribute to architectural and engineering initiatives encompassing video surveillance, access control, intrusion detection, perimeter security, and identity management, with a pronounced focus on cloud-based systems.Design and implement comprehensive enterprise physical security systems, including:Video Surveillance (IP-based camera systems)Access Control (cloud and on-premises)Intrusion Detection & Alarm SystemsLicense Plate Recognition (LPR)Intercom and Visitor Management SystemsResponsibilities:Architect and manage security system environments (cameras, access control, sensors, intercoms).Support integrations for:Single Sign-On (SSO)SCIM user provisioningRole-based access control (RBAC)Conditional Access policiesAssist in establishing standardized naming conventions, device deployment standards, and comprehensive system documentation.Ensure systems are scalable for multi-site/global deployments.Design secure Power over Ethernet (PoE) and network topology for cameras and controllers.Configure VLAN segmentation for security devices.Collaboration:Work closely with network engineers to:Implement Quality of Service (QoS) policiesEnsure proper bandwidth allocationMaintain secure firewall rules

Join Efficient Computer as a Lead RTL Design Engineer, where you will spearhead the development of cutting-edge RTL designs for our innovative hardware products. In this pivotal role, you will collaborate with a dynamic team to deliver high-performance solutions that meet the demands of our clients.

Saronic Technologies stands at the forefront of innovation, steering the future of maritime operations with cutting-edge autonomous solutions that redefine efficiency and safety at sea.Job Overview: We are looking for a talented Physical Security Systems Engineer who will take charge of designing, implementing, integrating, and managing the lifecycle of our enterprise physical security technologies. This role involves collaborating on architectural and engineering projects encompassing video surveillance, access control, intrusion detection, perimeter security, and identity integrations, with a particular focus on cloud-managed systems and identity integration.

About Neuralink:At Neuralink, we are pioneering technology that establishes a bi-directional interface with the human brain. Our innovative devices aim to restore movement to those who are paralyzed, restore sight to the visually impaired, and transform the way humans engage with their digital environments.Team Overview:The EPC team plays a crucial role in all engineering, procurement, and construction activities, from developing new greenfield sites to enhancing existing facilities. We collaborate with cross-functional teams to identify and address their present and future requirements, creating tailored environments that foster the growth of our research and engineering initiatives.We seek dynamic individuals who thrive in fast-paced settings, advocate for teamwork and transparent communication, and possess a genuine enthusiasm for design and construction. This role demands exceptional organizational skills, a consistent track record of high-performance, a passion for interdisciplinary projects, and an eagerness to contribute to Neuralink's mission!Key Responsibilities:As a senior mechanical engineer on our design team, you will be instrumental in conceptualizing and optimizing facilities. You will translate innovative concepts into detailed designs for HVAC, hydronic (chilled and heating water), plumbing, and process utility systems that seamlessly integrate with our facilities and manufacturing processes. Your work will encompass new construction as well as modifications to existing infrastructures. This position will support construction, facility operations, and various cross-functional departments to ensure that infrastructure systems are expertly designed to support all company activities.Develop conceptual designs and finalize designs for diverse project types including offices, laboratories, clean rooms, manufacturing facilities, warehouses, data centers, vivariums, and animal care facilities.Create high-quality Building Information Modeling (BIM) (REVIT) models, engineering drawings, and one-line diagrams for all mechanical, plumbing, and process systems.Design HVAC, hydronic, plumbing, and process utility systems that comply with codes, remain cost-effective, and satisfy quality and scheduling requirements.Prepare comprehensive construction drawing packages, including details, specifications, and operational sequences.Generate Building Automation System (BAS) and Direct Digital Control (DDC) control documents, scopes of work, and vendor quotes.Develop specifications, data sheets, and procurement requests for proposals (RFPs) for long-lead mechanical and plumbing equipment.Ensure all designs adhere to relevant codes and standards for optimal performance.