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Design Verification Engineer

OpenAISan Francisco
On-site Full-time

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Experience Level

Experience

Qualifications

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with a minimum of 3 years of experience in hardware verification. Demonstrated success in verifying complex IP or SoC designs utilizing industry-standard methodologies. Expertise in SystemVerilog, UVM, and proficiency with common simulation and debugging tools (e.g., VCS, Questa, Verdi). In-depth knowledge of computer architecture concepts, memory and cache systems, coherency, interconnects, and/or machine learning compute primitives. Experience with performance modeling, formal verification, or emulation is advantageous.

About the job

About Our Team:

At OpenAI, our Hardware organization is at the forefront of designing silicon and system-level solutions that cater to the specific needs of advanced AI workloads. Our team is dedicated to developing the next generation of AI-native silicon, collaborating closely with software and research partners to create hardware that seamlessly integrates with AI models. Beyond delivering production-grade silicon for OpenAI’s supercomputing infrastructure, we innovate with custom design tools and methodologies that are specifically optimized for AI.

About the Role:
We are on a mission to develop custom silicon that powers the next generation of cutting-edge AI models, and we are seeking seasoned Design Verification Engineers to ensure the functional integrity and robustness of our state-of-the-art ML accelerators. In this pivotal role, you will be responsible for verifying intricate hardware systems, spanning from individual IP blocks to complete SoC architectures. You will collaborate closely with architecture, RTL, software, and systems teams to ensure the delivery of reliable silicon at scale.

Key Responsibilities:

  • Lead the verification efforts for one or more components, including custom IP blocks, subsystems (such as compute, interconnect, and memory), or full-chip SoC functionality.

  • Develop comprehensive verification plans in alignment with architecture and microarchitecture specifications.

  • Create constrained-random, directed, and system-level testbenches utilizing SystemVerilog/UVM or equivalent methodologies.

  • Design and uphold stimulus generators, checkers, monitors, and scoreboards to guarantee optimal coverage and correctness.

  • Facilitate bug triage and root cause analysis, collaborating closely with design teams to drive resolutions.

  • Contribute to regression infrastructure, coverage analysis, and closure processes for both block-level and top-level environments.

About OpenAI

OpenAI is a pioneering organization focused on advancing artificial intelligence. Our Hardware team is dedicated to creating innovative silicon solutions that meet the demands of sophisticated AI workloads. By joining us, you will be part of a visionary team that is redefining the future of AI technology through collaboration, innovation, and cutting-edge engineering.

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