Senior Staff Physical Design Engineer - EMIR

At Tenstorrent, we are at the forefront of revolutionary AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI reshapes the computing landscape, our solutions adapt to integrate innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team has engineered a high-performanc…

At Tenstorrent, we are pioneering advancements in AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI transforms the computing landscape, our solutions are designed to integrate innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team of technologists has built a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a commitment to developing an exceptional AI platform. We prioritize collaboration, curiosity, and a dedication to tackling challenging problems. As we expand our team, we invite contributors of all experience levels to join us.We are looking for skilled Physical Design Engineers to develop high-performance blocks for our state-of-the-art CPU and AI/ML architectures. In this role, you'll manage the entire implementation process from synthesis to tapeout, collaborating with leading engineers to push the limits of performance, power, and area. If you are passionate about designing silicon that drives the future of AI computing and enjoy solving intricate design challenges, we would love to have you as part of our team.This position is hybrid, based in Austin, TX, Santa Clara, CA, or Fort Collins, CO.We welcome applicants with diverse experience levels. During the interview process, we will evaluate candidates to align offers with their respective skill levels, which may differ from the one stated in this posting.

About Etched Etched builds the first AI inference system tailored for transformers, delivering over 10x higher performance with lower cost and latency than conventional approaches. The company’s ASIC technology powers advanced products, from real-time video generation to sophisticated reasoning agents. Backed by leading investors and staffed by top engineers, Etched is focused on reshaping the infrastructure that supports the fast-moving AI sector. Role Overview The Senior Physical Design Engineer will play a central role in block-level implementation and verification. This position focuses on driving timing closure and optimizing power, performance, and area (PPA). The engineer will oversee third-party design partners and help refine internal workflows to accelerate design cycles. What You Will Do Develop a deep understanding of physical design challenges and solutions Run physical design flows to achieve block closure, improve ASIC infrastructure, and automate design steps Work closely with RTL designers, offering feedback to improve PPA Create dashboards to monitor project convergence in physical design Refine tool flows and collaborate with EDA vendors to adopt new technologies Take responsibility for achieving block-level closure Manage relationships with third-party physical design service providers Who We’re Looking For 5 to 10+ years of hands-on experience in physical design Strong background in tools, flows, and methodologies from RTL synthesis through GDSII sign-off Proven track record in back-end design and timing closure on advanced nodes (5nm and below) Familiarity with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL-to-GDSII flows Experience using sign-off tools such as PrimeTime, Tempus, Voltus, and similar Knowledge of UPF-based low power design, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis Creative thinker with strong problem-solving skills Location Austin

Join Stanley Consultants, an esteemed global consulting engineering firm recognized for its commitment to culture, ethics, and client satisfaction. We tackle complex challenges to foster a sustainable and interconnected world while adapting to technological advancements and resilient practices.With over a century of experience across energy, federal government, transportation, and water sectors, we are shaping the infrastructure that enhances lives. As an employee-owned organization, we prioritize a "People First" approach, valuing your voice, growth, and success.We provide flexible work arrangements, competitive compensation, comprehensive benefits, and the opportunity to build a fulfilling, long-term career.

Location: Austin, TX (Hybrid: 2 to 3 days onsite per week) Role overview The Senior Staff Systems Design Engineer at Weedmaps leads the transformation of the company’s design system into a scalable, production-ready foundation. This position connects Design, Engineering, and AI tooling, focusing on building, operationalizing, and scaling the system for all user interface surfaces. The role balances rapid development with high standards for usability and craftsmanship, ensuring alignment with engineering architecture and consistency across applications. Collaboration is central, working with Engineering (CI/CD, tokens, tooling), Creative (brand cohesion and evolution), and Product Design (development and iteration) to drive adoption and improve the product experience. What you will do Define and iterate on a multi-platform system for web and mobile, grounded in solid architecture, governance, and scalability principles. Own the system roadmap, setting priorities based on product needs, adoption gaps, and system performance. Collaborate with Design and Creative leaders to ensure quality craftsmanship, modern interaction patterns, and alignment with evolving brand standards. Design and implement core system components, including intuitive, flexible, and scalable APIs, variants, and composition patterns. Maintain high standards for visual accuracy, fidelity, accessibility (using React Aria), and interaction quality, including motion and state management. Continuously improve components based on real product usage and edge case scenarios. Implement automated quality systems such as visual regression testing, and conduct ongoing audits to uphold usability and craftsmanship, taking a cross-functional approach to quality. Lead migration of legacy user interfaces, ensuring smooth integration of key product surfaces (like CTAs and checkout flows) powered by the design system to increase adoption across the platform. Enhance Developer Experience by creating well-structured, intuitive component APIs that balance flexibility and simplicity. Establish a reliable tool-to-code pipeline (Figma, Claude, Builder, and others) to keep design artifacts and production components in sync and minimize drift. Partner with Engineering on architectural decisions (CI/CD, token systems, distribution infrastructure) and support enforcement mechanisms such as linting and token constraints to maintain system integrity. Introduce and standardize AI-assisted workflows, structure components for AI-friendly generation, and integrate tools (Builder.io, Gemini, and others) to improve consistency. Mentor designers and engineers, sharing best practices and guiding system usage to foster a strong, knowledgeable community.

Join Tenstorrent as a Physical Design Engineer, where you will be at the forefront of cutting-edge semiconductor design. This role will involve working collaboratively with cross-functional teams to develop robust and efficient physical designs, ensuring optimal performance and manufacturability of our next-generation products.

Wehrtyou is seeking a Physical Design Engineer to develop advanced physical layouts for semiconductor products. This role directly shapes hardware design and implementation, balancing high performance with manufacturability. Key responsibilities Create and refine physical layouts for semiconductor devices Collaborate with multidisciplinary teams to optimize designs Ensure layouts comply with industry standards for quality and reliability Support product delivery from initial concept through manufacturing Locations Austin, TX, United States Boulder, Colorado, United States Chicago, Illinois, United States London, United Kingdom New York, NY, United States Seattle, Washington, United States Work culture Engineers at Wehrtyou contribute to projects that help shape the future of technology. The team emphasizes collaboration, technical growth, and practical problem-solving.

Neuralink develops devices that connect directly with the human brain. The company’s technology focuses on restoring movement for people with paralysis, improving vision for those with impairments, and changing how people interact with digital systems. The Brain Interfaces Hardware Department leads the design of chip architecture and silicon systems for neural recording and stimulation. This group works on system-on-chip (SoC) solutions that support high-bandwidth brain-machine interfaces. Team members include engineers committed to advancing neurotechnology. Role overview The Physical Design and Verification Engineer manages the full physical design flow from RTL to GDSII. This includes: Synthesis Placement Clock tree synthesis Detailed routing Optimization Physical signoff verification Locations This position is based in Austin, Texas or Fremont, California.

Join our innovative team as an ASIC Physical Design Engineer in the vibrant city of Austin, Texas. In this role, you will leverage your expertise to design and implement cutting-edge ASIC physical layouts, ensuring high performance and reliability.As a key member of our engineering department, you'll collaborate with cross-functional teams to drive projects from conception through to completion, all while adhering to strict timelines and quality standards.

Join Tenstorrent, a pioneer in advanced AI technology, where we are reshaping performance standards, user experience, and cost effectiveness in computing. As AI transforms the technological landscape, we are committed to integrating innovations across software models, compilers, platforms, networking, and semiconductors. Our talented team has built a high-performance RISC-V CPU from the ground up, driven by a collective enthusiasm for AI and an unwavering commitment to create the premier AI platform. We cherish collaboration, curiosity, and a shared mission to tackle challenging problems. We are expanding our team and invite applicants of all experience levels.The Staff Design for Test (DFT) Engineer will play a crucial role in developing high-performance designs for leading AI/ML architectures. This position involves comprehensive engagement in all aspects of implementation, from RTL to tapeout for various IP components on the chip. Key challenges include minimizing testing costs while achieving high coverage and facilitating debug and yield learning with minimal design interference. You will collaborate with a team of seasoned engineers across multiple ASIC domains.This position is hybrid, based in either Santa Clara, CA or Austin, TX.We encourage candidates with diverse experience levels to apply. During the interview process, candidates will be evaluated for the appropriate level, and compensation offers will be aligned accordingly.

Renesas Electronics Corporation seeks a Staff Design Verification Engineer based in Austin. This position helps maintain high standards during the design verification process, contributing to technology that appears in a wide range of electronic products. Role overview This role focuses on ensuring quality and reliability by verifying design implementations. The work directly impacts technology used in many electronic devices, supporting Renesas’s reputation for dependable products. Key responsibilities Contribute to the design verification process for electronic technologies Help uphold quality standards throughout verification stages Support the development of products used in diverse electronic applications Location This position is based in Austin.

Join Tenstorrent as an AI/ML Physical Design Flow Engineer and contribute to our cutting-edge projects that leverage artificial intelligence and machine learning in physical design processes. You will work closely with a talented team to develop and optimize design flows, ensuring efficiency and high performance in our systems.

About BetterUp BetterUp’s mission centers on unlocking human potential. The company is rethinking the connection between employers and employees, focusing on meaningful work and personal growth. Every team member, from day one, receives support that goes beyond a paycheck: a dedicated BetterUp Coach, a personalized development plan, and a manager committed to growth. The culture values purpose-driven work and a supportive, collaborative atmosphere. Role Overview: Senior Staff Product Designer Location: Austin, TX This role shapes the future of BetterUp’s platform as the company moves from a suite of separate products to a unified, intelligent experience for users worldwide. The Senior Staff Product Designer is responsible for defining and evolving the design language and ensuring that products, tools, and experiences work together seamlessly. What You Will Do Envision and drive the integration of BetterUp’s products into a cohesive platform Balance user empathy with a structured, systems-oriented approach to design Collaborate closely with leaders in product, research, engineering, and design Define and uphold the principles that guide experience architecture Mentor senior designers and help maintain the quality and consistency of the design system Lead a small team of designers, influencing design quality and strategy across the company Team & Culture Design at BetterUp is central to the company’s mission of global human transformation. The environment is focused and fulfilling, best suited for those who are motivated by meaningful work and eager to make a lasting impact. Collaboration and mentorship are woven into daily work, and design has a seat at the table in shaping the company’s direction.

Join our innovative team at Renesas Electronics as a Senior Staff Design Architecture Engineer. In this pivotal role, you will leverage your extensive expertise to drive the development of advanced design architectures that meet the evolving needs of our customers. Collaborate with cross-functional teams to design, implement, and optimize complex systems that enhance performance and efficiency.

Location: Austin, TXEmployment Type: Full-time, In-OfficeDepartment: Engineering / ProductSalary: $160K – $200K annually + equity in the companyJoin our dynamic team as a Senior Staff Product Designer at Steadily, where we are dedicated to crafting intuitive and engaging experiences across the complete lifecycle of our customers. This full-time, in-office position is based in the vibrant city of Austin, TX.In your role, you will take charge of the entire design journey for critical product components. Your expertise will enable you to transform intricate requirements into sleek, high-performing interfaces. You will serve as the vital link between high-level vision and tangible code, ensuring that each user interaction is seamless and intuitive.Key Responsibilities:Lead the comprehensive design process from initial discovery through to delivery, rapidly iterating based on real user data and team insights.Craft user-centric experiences for our marketing site, web application, and documentation, aiding landlords in securing insurance for their rental properties.Work collaboratively with Product, Engineering, and Operations to transform real-world user needs into effective design solutions. Your designs will not just remain in Figma; they will be implemented swiftly, viewed by users, and will significantly impact product and business results.Produce wireframes, prototypes, and high-fidelity mockups that harmonize user objectives, technical constraints, and business goals. Conduct usability tests and gather feedback from a diverse user base, including landlords and insurance professionals, to validate design decisions and identify potential blind spots.Simplify intricate data and workflows such as coverage selection, policy document management, and production reporting into clear, digestible visuals.Review engineering pull requests to ensure designs are executed accurately and consistently. When discrepancies arise, you will effectively communicate solutions for rectification.Please note: this position may not be suitable for everyone. If you prefer a tranquil, pixel-perfect design role with slow timelines and minimal challenges, this may not be the right fit. However, if the above resonates with you, we would be thrilled to welcome you aboard.

At Tenstorrent, we are at the forefront of pioneering AI technology, setting new standards for performance, user experience, and cost efficiency. As AI transforms the computing landscape, our solutions are evolving to integrate advanced software models, compilers, platforms, networking, and semiconductor innovations. Our dynamic team of technologists has engineered a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a dedication to creating the best AI platform available. We prioritize teamwork, inquisitiveness, and a relentless pursuit of tackling challenging problems. We are expanding our team and are eager for contributors of all experience levels to join us.We are searching for an outstanding Senior SoC Physical Design Engineer to lead the top-level implementation of our intricate AI and CPU SoC designs. In this role, you will facilitate cross-disciplinary collaboration, crafting advanced floorplans, power grids, and clock networks, while ensuring design closure at the chip level. If you possess a talent for navigating the complexities of full-chip physical design and aspire to deliver next-generation AI hardware, your expertise is needed here.This position is hybrid, with work based out of Santa Clara, CA; Austin, TX; or Fort Collins, CO.We encourage applications from candidates of varying experience levels. During the interview process, we will assess candidates for the appropriate seniority level, and compensation will reflect that level, which may differ from what is stated in this posting.

At Tenstorrent, we are at the forefront of AI technology, transforming performance benchmarks, usability, and cost-effectiveness in the industry. As AI reshapes the computing landscape, our solutions are designed to integrate innovations across software models, compilers, platforms, networking, and semiconductors. With a passionate team of technologists, we have engineered a high-performance RISC-V CPU from the ground up, driven by our enthusiasm for AI and our commitment to creating the premier AI platform. We prioritize collaboration, curiosity, and a relentless pursuit of challenging problems. Join us as we expand our team and welcome contributors of all experience levels.We are currently on the lookout for a SoC Physical Design Verification Engineer who will take charge of full-chip signoff and guarantee the manufacturability and high quality of silicon across advanced technology nodes. In this role, you'll spearhead physical verification closures (DRC, LVS, ERC, etc.), troubleshoot issues using standard industry PV tools, and work alongside RTL, PD, CAD, and packaging teams to ensure successful tapeouts. If you thrive in a dynamic environment and relish tackling intricate challenges in cutting-edge silicon, we want to hear from you.This position is hybrid, based in Santa Clara, CA; Austin, TX; or Fort Collins, CO.We invite applicants of various experience levels for this role. During the interview process, we will assess candidates for the appropriate level, and offers will be made accordingly, which may differ from the one in this posting.

At Tenstorrent, we are at the forefront of pioneering AI technology, setting new benchmarks for performance, usability, and cost-effectiveness. As AI reshapes the computing landscape, our solutions must adapt to integrate advances in software modeling, compilers, platforms, networking, and semiconductors. Our diverse group of technologists has successfully crafted a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a relentless pursuit to create the finest AI platform. We cherish collaboration, curiosity, and a steadfast commitment to tackling complex challenges. As we expand our team, we invite contributors at all experience levels to join us.We are currently seeking a Timing Engineer to enhance our silicon team. In this pivotal role, you will spearhead static timing analysis and closure for intricate, high-performance designs. You will work in close partnership with logic, DFT, and physical design teams to troubleshoot constraints, optimize timing paths, and ensure our chips meet performance objectives across various corners and modes.This position is hybrid, based in Austin, TX, Fort Collins, CO, or Santa Clara, CA.We encourage candidates of all experience levels to apply. Throughout the interview process, candidates will be evaluated for their fit, and offers will correspond to the assessed level, which may differ from the one stated in this posting.

Join Tenstorrent as a Full-Chip Physical Design Verification Engineer, where you will play a pivotal role in ensuring the integrity and performance of our cutting-edge semiconductor designs. You will collaborate closely with cross-functional teams to validate full-chip designs, enhancing their functionality, reliability, and efficiency.Your expertise will be crucial in developing and executing verification plans, identifying and resolving issues, and contributing to the advancement of our innovative technology. If you are driven by a passion for excellence and are eager to work in a dynamic environment, we want to hear from you!

At Tenstorrent, we are at the forefront of pioneering AI technology, challenging the norms of performance, usability, and cost-effectiveness. As AI reshapes the landscape of computing, we are committed to evolving our solutions to integrate advancements in software models, compilers, platforms, networking, and semiconductor technologies. Our dynamic team has successfully built a high-performance RISC-V CPU from the ground up, fueled by a collective passion for AI and a relentless drive to create the ultimate AI platform. We cherish collaboration, curiosity, and a strong commitment to tackling complex challenges. As we expand our team, we welcome contributors across all experience levels.We are currently on the lookout for a Physical Design Engineer to take charge of timing for subsystems within our AI accelerator chip. In this role, you will work closely with RTL designers during the design exploration phase to evaluate the feasibility and performance, power, and area (PPA) of micro-architectural features. Your tasks will involve developing timing constraints and guiding the transition to physical design implementation. Key responsibilities include synthesis, place and route, timing analysis and closure, and power optimization. With a wide design space available for AI accelerators, your contributions will be crucial in selecting micro-architecture design points that align with die-size and PPA objectives.This position offers a hybrid work environment, with options based in Austin, TX, Santa Clara, CA, or Fort Collins, CO.We invite candidates of all experience levels to apply. During the interview process, we will assess each candidate's fit for the appropriate level, and compensation will correspond accordingly, which may differ from the level indicated in this posting.