About the job
Join MatX in Revolutionizing AI Technologies
At MatX, we are on a mission to enhance the efficiency of the world’s best AI models, propelling the advancement of AI quality and accessibility. We are looking for talented Silicon Verification Engineers to be part of our innovative team, dedicated to developing top-tier silicon solutions for high-performance and sustainable Generative AI. In this role, you will play a crucial part in ensuring the delivery of high-performance and functionally precise silicon for MatX products, encompassing compute, memory management, high-speed connectivity, and other pivotal technologies.
Your Responsibilities:
- Contribute to the enhancement of MatX’s verification methodology, offering scalable solutions across blocks, subsystems, full chip, and system-level validation.
- Take ownership of verification execution at both subsystem and chip levels, developing testbenches, tests, and related artifacts to achieve structural and functional coverage closure.
- Plan and lead intermediate and sign-off reviews on verification test plans, track execution progress, and ensure verification closure in line with critical silicon milestones such as design freeze and tapeout.
Who We Are Looking For:
- Experience in driving verification from architecture and/or design specifications through to production silicon.
- Proficiency in SystemVerilog, Python, C/C++, Bluespec, and similar scripting and programming languages for verification and silicon modeling.
- Hands-on experience with advanced verification methodologies like UVM and assertion-based verification (ABV); comfort with both formal and simulated verification is essential.
- Experience in creating portable tests and drivers for silicon validation and post-silicon debugging.
- Strong understanding of silicon micro-architecture and design concepts used in high-performance computing (CPUs, GPUs, accelerators), high-speed connectivity, memory management, and related functionalities.
- Familiarity with emulation and prototyping platforms and methodologies is advantageous.
- Hands-on experience in silicon debugging and bring-up will be considered a strong plus.

