About UsHarmattan AI is at the forefront of the defense sector, innovating autonomous and scalable defense systems. With a successful $200M Series B funding round that values our company at $1.4 billion, we are poised for growth and are expanding our teams to deliver essential systems for allied forces.Our mission is driven by a commitment to creating technologies that have a meaningful impact, striving for excellence, setting ambitious objectives, and tackling the most challenging technical problems. We thrive in a demanding environment that values rigor, ownership, and execution.About the RoleAs an FPGA Radio Engineer, you will play a critical role in designing and implementing the communications link between our drones and ground stations. Collaborating closely with our hardware and embedded software teams, you will have complete ownership of the RF signal-processing pipeline—from initial architecture to production-ready deployment. This position is perfect for a highly independent engineer who can make system-wide decisions and advance them in a dynamic, high-pressure environment.ResponsibilitiesLead the architecture and design of low-latency FPGA-based communications pipelines, covering the entire signal chain: modulation/demodulation (e.g., OFDM, QAM), FFT, channel coding and decoding (e.g., LDPC, Turbo, Viterbi), synchronization, equalization, and link adaptation.Manage the complete FPGA development lifecycle, from feasibility studies and architectural decisions to RTL implementation, simulation, verification, and deployment of robust, production-ready designs.Perform system-level link budget analysis, waveform simulations, and performance modeling to validate design decisions and evaluate real-world performance under various conditions including noise, interference, and multipath.Design and uphold comprehensive test benches and validation frameworks for complex DSP pipelines, including hardware-in-the-loop testing with actual RF front-ends.Collaborate with RF hardware engineers to ensure seamless integration between FPGA designs and the analog front-end (ADC/DAC interfaces, AGC, frequency planning).Assess and choose FPGA platforms, IP cores, and toolchains based on project constraints such as latency, throughput, power consumption, and long-term scalability.Define and document clear, well-specified interfaces between the FPGA, embedded software, and hardware layers.
Mar 17, 2026