Senior Staff Design Verification Engineer

Join d-Matrix, where we are dedicated to leveraging the power of generative AI to revolutionize technology. We are pioneering in both software and hardware innovation, constantly expanding the limits of what is achievable. Our workplace culture emphasizes respect and collaboration.We greatly value humility and encourage open communication. Our team is divers…

Join Tenstorrent as a Full-Chip Physical Design Verification Engineer, where you will play a pivotal role in ensuring the integrity and performance of our cutting-edge semiconductor designs. You will collaborate closely with cross-functional teams to validate full-chip designs, enhancing their functionality, reliability, and efficiency.Your expertise will be crucial in developing and executing verification plans, identifying and resolving issues, and contributing to the advancement of our innovative technology. If you are driven by a passion for excellence and are eager to work in a dynamic environment, we want to hear from you!

At d-Matrix, we are dedicated to unlocking the full potential of generative AI to drive technological transformation. Our team stands at the cutting edge of software and hardware innovation, continually pushing the limits of what is achievable. We foster a culture of respect and collaboration.We value humility and advocate for open communication. Our inclusive team embraces diverse perspectives, leading to superior solutions. We are looking for passionate individuals who thrive on challenges and are committed to execution. Are you ready to discover your playground? Together, we can shape the limitless possibilities of AI.Location:This position is hybrid, requiring you to work onsite at our Santa Clara office for 3 days a week. The internship runs for 12 weeks, either from June 1st to August 21st or from June 22nd to September 11th.Job Title: HW Design Verification InternWhat You Will DoYou will collaborate with a team to develop state-of-the-art LLM inference SoCs, gaining valuable hands-on experience with modern computing units, crossbars, chiplet interconnects, and high-performance memory interfaces.In this role, you will:Contribute to the functional verification of complex hardware blocks using UVM-based methodologies,Enhance bug detection through formal verification techniques utilizing SystemVerilog Assertions (SVA),Develop and maintain tools to boost simulation efficiency and verification productivity, andInvestigate how emerging AI-assisted workflows can strengthen DV methodologies.What You Will BringCurrently pursuing a Master’s or PhD in Electrical and Computer Engineering or a related field.Relevant coursework in Computer Architecture, Verilog, and/or FPGA development.Proficiency in SystemVerilog programming (required).Familiarity with SystemVerilog Assertions (SVA) is preferred but not mandatory.Current knowledge of AI SoC and/or LLM inference architectures is a plus.Strong verbal and written communication skills.

At Tenstorrent, we are at the forefront of innovation in artificial intelligence, transforming the standards for performance, usability, and cost-effectiveness. As AI reshapes the computing landscape, our solutions must adapt to integrate advancements in software models, compilers, platforms, networking, and semiconductor technology. Our talented team has successfully designed a high-performance RISC-V CPU from the ground up, driven by a shared enthusiasm for AI and a commitment to creating the ultimate AI platform. We foster a culture of collaboration, curiosity, and a relentless pursuit of solutions to challenging problems. Join us as we expand our team, welcoming contributors of all experience levels.As a Formal Verification Engineer at Tenstorrent, you will play a pivotal role in implementing sophisticated formal verification techniques to ensure the integrity of complex CPUs and chiplets. This position requires you to spearhead the formal verification strategy, mentor fellow engineers, and promote collaboration across teams to maintain high standards of quality and functional accuracy. Your contributions will be crucial in advancing groundbreaking technologies and ensuring their optimal performance.This position is hybrid, with options available in Santa Clara, CA, Austin, TX, or Bangalore, IN.We encourage applicants from diverse experience backgrounds, and during the interview process, candidates will be evaluated for the appropriate experience level, with offers tailored accordingly.

Join our dynamic team as an Onsite ASIC/SOC Verification Engineer at Rootshell Enterprise Technologies in Santa Clara. We are seeking two engineers for direct on-site work in the USA, along with a group of twenty engineers based in India and Korea. Among these, five will take leadership roles and will be willing to relocate to Korea, with visa arrangements taken care of by us. The remaining fifteen will be working remotely from India. This role focuses on ASIC/SOC verification, and candidates must possess a minimum of five years of experience as Verification Engineers.Key Responsibilities:- Engage in block-level verification using System Verilog, and UVM or OVM methodologies for a minimum of two years.- Collaborate with cross-functional teams to ensure product quality and performance.Essential Skills:- At least five years of experience as a Verification Engineer.- Proficient in System Verilog and UVM/OVM methodologies.- Additional skills that are advantageous (but not mandatory) include SVA (SystemVerilog Assertions), modem baseband verification experience, AHB, AXI or memory controller knowledge, and ARM-based assembly testing.

Role Overview pddninc is seeking a Remote ASIC Verification Engineer to support the development and verification of advanced ASIC designs. This role is fully remote, with the team based in Santa Clara. What You Will Do Work closely with engineering teams to verify ASIC designs and ensure they meet project requirements Contribute to the development of high-performance hardware projects About the Team Join a group focused on building reliable, high-quality ASIC solutions. The team values technical skill and a collaborative approach to problem-solving.

Role overview The Senior PCB Design Engineer at d-matrix in Santa Clara will take ownership of advanced printed circuit board design and development. This position combines technical leadership with hands-on design, supporting technology-driven products from concept to production. Responsibilities Lead PCB design projects from initial concept through production release Partner with engineering, manufacturing, and other teams to deliver high-quality, high-performance board designs Use current design tools and industry methodologies to enhance efficiency and board functionality Ensure all designs comply with company and industry standards for quality and reliability Collaboration This role requires frequent coordination with cross-functional teams to align on requirements, address technical challenges, and support the transition of designs into manufacturing.

Join d-Matrix, where we are dedicated to unlocking the transformative power of generative AI. As pioneers in both software and hardware innovation, we challenge the limits of technology. Our collaborative culture fosters respect and teamwork, ensuring diverse perspectives lead to superior solutions.We believe in humility and prioritize open communication. If you are passionate about overcoming challenges and driven by results, your playground awaits! Together, we can redefine the future of AI.Location:Hybrid model, with three days a week onsite at our headquarters in Santa Clara, CA.Role Overview: Staff Analog Design EngineerResponsibilities:Engage in analog-mixed signal integrated circuit design utilizing leading-edge tools such as Cadence and Synopsys. Your contributions will include designing cutting-edge in-memory compute engines for AI accelerators and developing Die-Die serial interfaces for scalability.Your scope of work will encompass schematic circuit design, system-level performance analysis, crafting test benches for simulations, and guiding layout engineers on deep sub-micron process nodes (7nm and below). You will also optimize design and layout for low power performance, conduct six-sigma Monte-Carlo yield analysis, and make independent layout adjustments as necessary.Collaborate with backend engineers on design/layout integration.Provide circuit models for backend verification.Participate in testboard design for silicon bring-up and bench debugging or characterization.Develop scripts for silicon bring-up and testing features.

We appreciate your interest in joining Oklo! We are excited to welcome a Senior Mechanical Design Engineer to our innovative engineering team.Position OverviewIn your role as a Senior Mechanical Design Engineer, you will be tasked with designing essential assemblies and components utilized in our cutting-edge reactors. Your designs will transition from initial concepts to final production-ready designs. Throughout this lifecycle, you will collaborate closely with the Fuel Fabrication team to enhance manufacturability and inspectability of the designs. Furthermore, you will produce various documentation to articulate the specifications of these components, including drawings, product and material specifications, design basis documents, and calculation documents.Key ResponsibilitiesDevelop designs for components that meet performance and manufacturing standards.Create and refine design documentation to clearly define requirements.Engage in design reviews, providing and receiving critical technical feedback.Thoroughly assess mechanical designs to identify shortcomings and proactively implement solutions.Generate and maintain comprehensive 3D CAD models, 2D drawings, and bills of materials using controlled processes within PDM/PLM systems.Work closely with analysis teams to guide and interpret thermal, structural, fatigue, and safety analyses, supporting design validation.Conduct detailed manufacturability assessments, tolerance studies, and DFM/DFA evaluations to prepare components for production and assembly.Contribute to the continuous enhancement of Oklo’s mechanical design methodologies, tools, and standards through the sharing of insights and development of best practices.

At d-Matrix, we are dedicated to unlocking the transformative power of generative AI within the technology landscape. Positioned at the cutting edge of software and hardware innovation, we strive to redefine what is achievable. Our workplace fosters a culture of respect and collaboration.We prioritize humility and maintain open lines of communication. Our team is inclusive, embracing diverse perspectives that lead to more effective solutions. We seek individuals who are enthusiastic about overcoming challenges and are execution-oriented. Are you ready to discover your playground? Together, we can shape the limitless opportunities of AI.Location: Hybrid, with on-site work at our Santa Clara, CA headquarters three days a week.Role Overview: As a Senior Staff AI/ML System Software Engineer, you will join our team to help productize the software stack for our AI compute engine. Your responsibilities will include the development, enhancement, and maintenance of cutting-edge AI deployment software. You will leverage your extensive experience with the full-stack toolchain and understand the intricate balance required in hardware-software co-design. Your ability to develop and scale software solutions within tight timelines will be crucial, as you collaborate with compiler experts and other software (ML, systems) and hardware (mixed signal, DSP, CPU) specialists within the company.

Join Arista Networks as a Senior ODM Hardware Design Engineer, where you will play a crucial role in designing and developing innovative hardware solutions that drive our cutting-edge networking technologies. You will collaborate with a dynamic team of engineers to create reliable and efficient designs, ensuring high performance and scalability in our products.

Role Overview ServiceNow is seeking a Senior Staff Software Engineer, Integrations (Tech Lead) based in Santa Clara. This role leads integration projects that improve how technology fits together across the company. The position sits within the Engineering team and works closely with colleagues from different disciplines. What You Will Do Lead design and development of integration solutions that strengthen ServiceNow’s products. Collaborate with cross-functional teams to deliver projects that support customer needs. Drive initiatives that make technology more efficient and effective across the organization.

Role overview ServiceNow seeks a Senior Staff Software Engineer - UI Lead based in Santa Clara. This position leads a group of engineers dedicated to building and improving user interfaces that enhance the user experience. Collaboration with designers and other stakeholders is central to delivering thoughtful UI solutions. What you will do Guide a team of engineers working on UI development projects Work with designers to turn concepts into effective interfaces Make architectural decisions for UI components and systems Establish and uphold software engineering best practices Mentor junior engineers and support their professional growth Help shape the direction of ServiceNow’s product lines Location This role is based in Santa Clara, CA.

Archer Aviation, based in San Jose, California, is building all-electric vertical takeoff and landing aircraft designed for sustainable air travel. The company’s Midnight aircraft carries four passengers and operates with low noise. Archer values a diverse team and aims to create an inclusive workplace where different perspectives drive innovation. Role Overview The Staff Manufacturing Design Engineer - Standards and Methods will play a key part in scaling production of the Midnight 1.0 aircraft and developing the Midnight 1.1 platform. This position sits within the Manufacturing Design Engineering (MDE) team and focuses on bridging aircraft design with efficient, high-rate manufacturing. The role centers on establishing and maintaining standardized manufacturing processes to support Archer’s growth. Main Responsibilities Develop, document, and maintain standardized manufacturing engineering methods and best practices across the MDE organization. Create and uphold common frameworks for manufacturing planning, process definition, work instruction formats, and readiness for builds at every stage: development, certification, and production. Build a centralized, version-controlled knowledge base for manufacturing standards and processes. Work closely with Design, Quality, Supply Chain, and Certification teams to define and implement manufacturing solutions that support bringing new aircraft to market. Location Santa Clara, California, United States

Join ServiceNow as a Staff Product Designer specializing in AI transformation. In this pivotal role, you will lead the design of innovative products that leverage artificial intelligence to enhance user experiences. Collaborate closely with cross-functional teams to drive the design vision and influence product strategy.

Join our innovative team at Arista Networks as a Senior Hardware Design Engineer specializing in Ethernet Switching. In this pivotal role, you will leverage your expertise to design and develop cutting-edge hardware solutions that power high-performance networking systems.

Role Overview ServiceNow is looking for a Senior Staff Software Engineer focused on Performance Engineering to join the team in Santa Clara. This tech lead position centers on optimizing and advancing the performance of ServiceNow’s cloud-based platform. The work directly impacts the reliability and efficiency of infrastructure and operations, supporting strong service delivery for clients. What You Will Do Lead a team of engineers dedicated to performance improvements and platform optimization. Shape performance strategies that influence infrastructure and operational excellence. Mentor junior engineers, sharing knowledge and encouraging technical growth. Work closely with peers on architectural decisions and technical direction. Implement and promote engineering best practices to raise standards across the team. Guide projects through every stage, from initial concept to deployment. Support a culture of high performance and continuous improvement. Location This role is based in Santa Clara.

Join Tenstorrent as a Physical Design Engineer, where you will be at the forefront of cutting-edge semiconductor design. This role will involve working collaboratively with cross-functional teams to develop robust and efficient physical designs, ensuring optimal performance and manufacturability of our next-generation products.

Join d-Matrix, where we are dedicated to unlocking the transformative potential of generative AI technology. At the cutting edge of both software and hardware innovation, we're redefining possibilities. Our culture emphasizes respect and collaboration, fostering an environment where humility and straightforward communication thrive. We encourage an inclusive team dynamic that embraces diverse perspectives, leading to enhanced solutions. If you're passionate about tackling challenges and driven by results, come explore your playground with us. Together, we can shape the future of AI.Location:This position is hybrid, with 3 days a week at our Santa Clara, CA headquarters.Key Responsibilities:• Design and validate FPGA-based solutions for managing d-Matrix AI inference accelerators.• Specify FPGA microarchitecture in collaboration with stakeholders to meet project specifications.• Develop robust dual boot architecture for multi-core and multi-chiplet systems.• Create and implement hardware/software modules for platform power management, health monitoring, and telemetry data collection.• Interact with host server BMC using SMBus mailbox, implementing management protocols like MCTP, PLDM, and SPDM.• Integrate RISC-V CPU cores and associated firmware into FPGA architectures.• Develop the eFuse controller within the FPGA.• Design and integrate a secure boot solution compliant with NIST standards to enable secure booting for d-Matrix accelerator chiplets.• Collaborate with cross-functional teams to facilitate seamless integration of hardware and software, aiding in inference accelerator hardware bring-up and troubleshooting.• Write Python scripts for hardware testing and automation.Qualifications:• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's degree preferred. A minimum of 12 years of experience in FPGA design and verification is required.• Proficient in hardware design using Hardware Description Languages (HDLs) such as Verilog or VHDL.• Knowledgeable about RISC-V architecture and embedded systems development.• Familiar with hardware-software integration concepts.• Experience in scripting languages for automation and testing.

Join nEye.ai, an innovative and well-funded startup dedicated to transforming data centers through cutting-edge optical switch technology. Our MEMS-based silicon photonics optical circuit switches (OCS) address critical bottlenecks in AI processing by facilitating direct optical connections among thousands of GPUs and memory units. Our flagship product, the SuperSwitch, features an ultra-low power consumption, high radix, compact chip-scale design that significantly enhances performance, efficiency, and scalability for hyperscale data centers. Job Overview As a Senior MEMS Design Engineer at nEye.ai, you will play a key role in the design, simulation, and optimization of MEMS devices integral to our optical circuit switches. This position requires a blend of technical expertise and collaboration with cross-functional teams, including Silicon Photonics, Mechanical, and Process Engineers, to ensure that our MEMS structures are high-performing, robust, and reliable for mass production. Your proficiency in multi-physics modeling will be essential for optimizing our designs and addressing complex engineering challenges.