About the job
About the Team
At OpenAI, our Hardware organization is at the forefront of developing silicon and system-level solutions tailored specifically for the demanding requirements of advanced AI workloads. Our team is dedicated to pioneering the next generation of AI-native silicon, collaborating intimately with software and research partners to design hardware that is tightly integrated with AI models. Beyond delivering high-quality silicon for OpenAI's supercomputing infrastructure, we innovate by creating custom design tools and methodologies that propel hardware solutions optimized for AI.
About the Role
In this pivotal role, you will enhance the tooling ecosystem that hardware engineers depend on daily, encompassing hardware compilers, IR transformations, simulation, debugging, and automation infrastructure. Your contributions will bridge software engineering, compiler concepts, and practical hardware workflows, significantly influencing the speed and efficiency of designing next-generation AI systems. Collaborating closely with architects, RTL designers, and verification engineers, you will translate real engineering challenges into sustainable, scalable tooling solutions.
Key Responsibilities
Develop and enhance software tools to increase the efficiency of hardware teams: compilation, IR transformations, RTL generation, simulation, debugging, and automation.
Extend and integrate hardware compiler stacks (including frontends, IR passes, lowering, scheduling, and code generation to Verilog/SystemVerilog) and connect these with actual design workflows.
Enhance developer experience and system reliability: focus on reproducible builds, improved error messaging, quicker iteration cycles, and robust CI and regression infrastructures.
Collaborate with designers and verification engineers to transform identified pain points into effective solutions.
Engage with RTL as required: analyze and interpret Verilog/SystemVerilog to troubleshoot issues, validate tool outputs, and enhance debuggability.
Be prepared to delve deeply into the stack when necessary, including gate-level perspectives, synthesis outcomes, and implementation artifacts.
Support PPA optimization efforts by creating analysis and automation around area, timing, and power trade-offs, while improving tools that influence these aspects.
Ideal Candidate Profile
Proven experience in developing and maintaining software (through projects, internships, research, open-source contributions, or similar).

