About the job
At d-Matrix, we are on a mission to harness the power of generative AI and revolutionize technology. We stand at the cutting edge of software and hardware innovation, continuously exploring new frontiers of possibility. Our culture thrives on respect and collaboration.
We embrace humility and prioritize direct communication. Our inclusive team values diverse perspectives, fostering enhanced problem-solving. We are in search of passionate individuals eager to tackle challenges and driven by results. Are you ready to explore your potential? Together, we can redefine the limitless opportunities of AI.
Work Location:
This is a hybrid position, requiring onsite work at our Santa Clara, CA headquarters 3-5 days per week.
Key Responsibilities:
• You will lead pre-silicon power estimation for design blocks, encompassing both RTL and physical design power assessments.
• Collaborate with front-end and DV engineers to pinpoint power activity windows in designs, ensuring that feedback from estimations is effectively implemented to optimize power.
• Develop an architectural power estimation tool tailored for AI workloads, calculating power based on system configuration and die-level metrics, including workload profiling with respect to memory size, bandwidth, and gate counts of compute/memory blocks.
• Work alongside frontend architects and backend designers to compile necessary performance monitoring capabilities, system requirements, and usage analysis, contributing to hardware enhancements and die modifications.
• Integrate analysis feedback into design processes with the frontend team.
• Design micro-architecture and RTL, perform synthesis, and verify logic and physical power performance using state-of-the-art CAD tools and semiconductor technologies.
• Design and implement performance enhancement and power-saving/monitoring functions that facilitate efficient design, testing, and debugging, participating in silicon bring-up and validation.
Qualifications:
• Master's degree in Electrical Engineering, Computer Engineering, or Computer Science with 10-15 years of relevant industry experience or equivalent.
• Strong understanding of power, performance, micro-architecture, RTL, and physical design, with a focus on digital systems and IC design.