About the job

At Google DeepMind, we believe that Artificial Intelligence is one of humanity's most transformative inventions. Our diverse team of scientists, engineers, and machine learning specialists work collaboratively to push the boundaries of AI technology for public good and scientific progress, all while prioritizing safety and ethical considerations.

About Us

We have cultivated an innovative work culture at Google DeepMind that nurtures long-term, ambitious research. We are on the lookout for a passionate Silicon Microarchitecture Engineer to join our team and help drive the development of pioneering silicon solutions aimed at enhancing machine learning acceleration.

The Role

Key Responsibilities:

Collaborate within a dynamic, interdisciplinary team of Machine Learning, Hardware, Programming Languages, and Systems experts.
Design and architect high-performance machine learning accelerators, focusing on micro-architecture and RTL design.
Select and integrate both proprietary and third-party intellectual property.
Analyze various architectural trade-offs concerning performance, power consumption, energy efficiency, and area optimization.
Contribute to system architecture definition and evaluation processes.
Work closely with simulation and physical design teams to maintain relevant cost functions for architectural assessments.
Facilitate coordination of chip design efforts across various teams.
Provide guidance to design automation teams to enhance tool development.

About You

We are looking for an exceptional and driven hardware engineer to join our GenAI technical infrastructure research hardware team. This is an exciting opportunity to engage in groundbreaking architecture exploration that will influence the future of machine learning acceleration.

To ensure your success at Google DeepMind, we seek candidates with the following qualifications:

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
7+ years of experience in RTL design using Verilog/System Verilog.
5+ years of experience in defining micro-architecture.
3+ years of experience in RTL design verification.
Familiarity with high-performance compute IPs (e.g., GPUs, DSPs, or machine learning accelerators).
Proven ability to evaluate design trade-offs including speed, performance, and power efficiency.

About the job

About Us

The Role

Key Responsibilities:

Collaborate within a dynamic, interdisciplinary team of Machine Learning, Hardware, Programming Languages, and Systems experts.
Design and architect high-performance machine learning accelerators, focusing on micro-architecture and RTL design.
Select and integrate both proprietary and third-party intellectual property.
Analyze various architectural trade-offs concerning performance, power consumption, energy efficiency, and area optimization.
Contribute to system architecture definition and evaluation processes.
Work closely with simulation and physical design teams to maintain relevant cost functions for architectural assessments.
Facilitate coordination of chip design efforts across various teams.
Provide guidance to design automation teams to enhance tool development.

About You

To ensure your success at Google DeepMind, we seek candidates with the following qualifications:

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
7+ years of experience in RTL design using Verilog/System Verilog.
5+ years of experience in defining micro-architecture.
3+ years of experience in RTL design verification.
Familiarity with high-performance compute IPs (e.g., GPUs, DSPs, or machine learning accelerators).
Proven ability to evaluate design trade-offs including speed, performance, and power efficiency.

About Us

The Role

Key Responsibilities:

Collaborate within a dynamic, interdisciplinary team of Machine Learning, Hardware, Programming Languages, and Systems experts.

Design and architect high-performance machine learning accelerators, focusing on micro-architecture and RTL design.

Select and integrate both proprietary and third-party intellectual property.

Analyze various architectural trade-offs concerning performance, power consumption, energy efficiency, and area optimization.

Contribute to system architecture definition and evaluation processes.

Work closely with simulation and physical design teams to maintain relevant cost functions for architectural assessments.

Facilitate coordination of chip design efforts across various teams.

Provide guidance to design automation teams to enhance tool development.

About You

To ensure your success at Google DeepMind, we seek candidates with the following qualifications:

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.

7+ years of experience in RTL design using Verilog/System Verilog.

5+ years of experience in defining micro-architecture.

3+ years of experience in RTL design verification.

Familiarity with high-performance compute IPs (e.g., GPUs, DSPs, or machine learning accelerators).

Proven ability to evaluate design trade-offs including speed, performance, and power efficiency.