Qualifications
RESPONSIBILITIES:Lead a team dedicated to the digital design of ASICs and/or FPGAs for Starshield initiatives. Conduct architectural analyses for features, performance expectations, and system constraints. Develop specifications for subsystems and circuits, collaborating with modem/DSP and RFIC engineers to delineate hardware and software responsibilities. Define micro-architecture, implement RTL in Verilog/System Verilog, integrate into the top-level design, and deliver a fully verified, synthesis/timing clean design. Collaborate closely with the verification team to ensure comprehensive coverage and validation of the design. Engage with leaders from across the engineering organization to drive product requirements and push the performance boundaries for Starshield satellites. Recruit, train, develop, and retain exceptional team members who will excel in delivering solutions for our nation. Provide timing constraints for the IPs and assist the physical implementation team with synthesis, timing closure, and formal verification. Participate in silicon bring-up and validation, aiding in the development of automated test lab equipment for lab measurements. BASIC QUALIFICATIONS:Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related engineering discipline.5+ years of experience in RTL implementation and/or FPGA/ASIC development.2+ years of experience in a leadership role.
About the job
At SpaceX, we believe that a future where humanity explores the stars is far more thrilling than one where we remain confined to Earth. Our mission is to develop groundbreaking technologies that will make this vision a reality, ultimately aiming to enable human life on Mars.
MANAGER, ASIC DESIGN ENGINEERING (STARSHIELD)
Starshield utilizes SpaceX's Starlink technology and launch capabilities to enhance national security efforts. While Starlink serves consumer and commercial markets, Starshield is tailored for government applications, with an initial focus on earth observation, communications, and hosted payloads.
The Manager of ASIC Design Engineering will oversee a dynamic team responsible for developing ASICs and FPGAs for advanced satellite systems that transmit unprecedented data volumes at remarkable speeds to the service members safeguarding our nation and allies. This role encompasses leading a talented group of engineers from initial design through to on-orbit operations, ensuring the design, manufacture, testing, and operation of chips that enhance national security.
About SpaceX
SpaceX is revolutionizing space technology, with the ultimate goal of making life multi-planetary. By developing the Starlink product line, we are committed to enhancing connectivity and security, paving the way for governmental and commercial advancements in space.
