About the job
Join d-Matrix, where we are dedicated to harnessing the power of generative AI to revolutionize technology. At the forefront of software and hardware innovation, we continuously push the limits of what is achievable. Our culture fosters respect and collaboration, emphasizing humility and direct communication.
We pride ourselves on being an inclusive team, where diverse perspectives lead to innovative solutions. We are on the lookout for individuals who are passionate about overcoming challenges and are driven by results. Are you ready to explore the playground of possibilities with us? Together, we can redefine the future of AI.
Location: Hybrid, with three days a week onsite at our headquarters in Santa Clara, CA.
The Role: Principal Digital Design Engineer, Micro-Architect
What You'll Do:
You will play a crucial role in the micro-architecture and design of AI sub-system modules, including SIMD and Hardware Execution Engines. In collaboration with System Architects, you will define and implement a Custom ISA while developing an efficient C-Kernel. Your responsibilities will include owning the design, documentation, execution, and delivery of fully verified, high-performance, area, and power-efficient RTL to meet design targets. Additionally, you will engage in the design of micro-architecture and RTL, synthesis, and logic and timing verification using cutting-edge CAD tools and semiconductor process technologies. You will also implement logic functions for efficient testing and debugging and actively participate in the silicon bring-up and validation of your assigned blocks.
Key Responsibilities:
Lead the micro-architecture and design of AI Compute sub-system modules, including Hardware Execution Engines.
Own the design, documentation, execution, and delivery of fully verified, high-performance, area, and power-efficient RTL to achieve design targets.
Design micro-architecture and RTL, synthesis, logic, and timing verification using leading-edge CAD tools and semiconductor technologies.
Design and implement logic functions that facilitate effective testing and debugging.
Engage in silicon bring-up and validation for the blocks you own.
Qualifications:
Master's degree in Electrical Engineering, Computer Engineering, or Computer Science with 12+ years of relevant experience.
Extensive knowledge of micro-architecture design and RTL development.
Proficiency in using advanced CAD tools for synthesis and verification.
Demonstrated ability in silicon validation and debugging methodologies.
Strong communication skills and the ability to work collaboratively in a team environment.

