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Experience Level
Senior
Qualifications
The ideal candidate will possess:Proven experience in automation testing and integration solutionsStrong proficiency in relevant automation tools and frameworksExcellent problem-solving skills and attention to detail
About the job
Join Aravo Solutions as a Senior Automation Engineer (QA/Integrations) in vibrant Austin, Texas. In this role, you will be pivotal in enhancing our automation frameworks and integration processes, ensuring the highest quality in our software delivery.
About Aravo Solutions, Inc.
Aravo Solutions is a leader in providing innovative solutions that help organizations manage their vendor relationships effectively. Our commitment to quality and customer satisfaction sets us apart in the industry.
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Search for Digital Integrated Circuit Ic Design Engineer
Full-time|$116K/yr - $233.8K/yr|On-site|Austin, Texas, United States; Fremont, California, United States
About Neuralink:At Neuralink, we are pioneering the development of innovative devices that facilitate a bi-directional interface with the human brain. Our mission is to restore movement to those affected by paralysis, enable sight for the visually impaired, and transform the way individuals engage with their digital environments.Team Overview:The Brain Interfaces Hardware Department is at the forefront of delivering cutting-edge chip architecture and silicon implementation for neural recording and stimulation system-on-chip (SoC) solutions, aimed at high-bandwidth brain-machine interface applications. Our team consists of highly skilled engineers dedicated to expanding the boundaries of current technology and shaping the future.Role & Responsibilities:As a Digital IC Design Engineer, you will be tasked with the micro-architecture design and register-transfer level (RTL) implementation of digital intellectual properties (IPs) and systems, focusing on high-throughput, low-power digital signal processors (DSPs) and general-purpose hardware accelerators. Ideal candidates will possess product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC.Micro-architecture design and RTL implementation of:Low-power digital signal processorsLow-power general-purpose hardware acceleratorsLow-power graphics processing unitsLow-power radio MAC/PHYLow-power serial link MAC/PHYCollaborate with firmware engineers to design and optimize hardware/software interfaces.Optimize application-specific architectures, including:Complex system modeling for energy and performance benchmarksWorkload analysis and modelingEnergy/performance profiling and analysisTrade-offs between architecture design, process technology, and workload typesBalancing cost and performance amidst manufacturing process variationsEngage in silicon bring-up tests with verification engineers.
About OLIXAt OLIX, we are at the forefront of revolutionizing the semiconductor industry. As AI technology rapidly evolves, the demand for advanced infrastructure grows, creating significant opportunities for innovation. Traditional hardware designs are becoming obsolete, and OLIX is leading the charge with our groundbreaking Optical Tensor Processing Unit (OTPU) that delivers unmatched performance and energy efficiency. Join us in shaping the future of AI hardware.The RoleWe are on the lookout for exceptional Senior/Staff Digital Verification Engineers who possess extensive expertise in CMOS digital design and verification. In this role, you will be responsible for ensuring the functional accuracy of high-speed, real-time data processing silicon—from initial algorithm modeling to verified RTL, sign-off, and silicon bring-up.As part of a dynamic, multidisciplinary team, you will contribute to the creation of innovative OTPUs where the digital, optical, and mixed-signal domains converge. We seek candidates who are passionate about developing high-performance systems that power the next generation of AI technology.Key ResponsibilitiesLead the comprehensive verification of high-throughput digital pipelines that support multi-GSPS input rates and continuous streaming data paths.Design and implement robust verification environments using SystemVerilog/UVM, focusing on constrained-random testing, coverage closure, and regression automation.Establish and execute assertion-based verification strategies for control logic, data-path correctness, CDC/RDC, and protocol compliance.Utilize formal verification methods (property checking, assertions, equivalence checking) to enhance simulation-based verification and expedite bug detection.Model and validate algorithms with MATLAB/Simulink or Python to ensure functional equivalence from algorithmic models to RTL and gate-level sign-off.Assist with FPGA prototyping and silicon bring-up by crafting targeted test cases, debugging strategies, and post-silicon validation plans.Collaborate effectively with digital design, optical hardware, mixed-signal, and software teams to guarantee seamless integration and performance.
About OLIXAt OLIX, we recognize that the demand for AI technology is accelerating at an unprecedented pace, leading to a significant infrastructure challenge. Current chip and power generation methods are insufficient to meet this demand. The industry is still reliant on outdated hardware designs, which are no longer effective. A transformative approach that enhances speed and efficiency represents the largest economic opportunity of the coming century. OLIX is pioneering this new paradigm with our Optical Tensor Processing Unit (OTPU), which delivers unmatched performance and energy efficiency that existing chips simply cannot achieve.Your RoleWe are in search of exceptional Senior/Staff Digital Design Engineers who specialize in CMOS digital design. You will take complete ownership of the design and implementation of high-speed, real-time data-processing silicon, from initial algorithm modeling through to verified RTL and silicon integration. Join a multidisciplinary team that is at the forefront of developing next-generation OTPUs, where digital, optical, and mixed-signal technologies converge. The ideal candidate will possess a robust background in electrical engineering and semiconductor physics, coupled with a fervor for creating reliable, high-performance digital circuits that propel AI hardware advancements.Key ResponsibilitiesArchitect, design, and implement high-throughput digital pipelines (multi-GSPS input rates, continuous streaming data paths, deep pipelining, and hand-shaking) utilizing advanced CMOS nodes.Quickly prototype and iterate in FPGA (Xilinx/AMD, Intel, or equivalents): develop real-time demonstrations, validate high-speed transceivers, and integrate feedback into ASIC designs.Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence up to gate-level sign-off.Lead RTL development (SystemVerilog / Verilog / VHDL), encompassing synthesis, static-timing closure, and both formal and constrained-random verification.Evaluate power, performance, and area (PPA), employing innovative strategies to meet aggressive bandwidth-per-watt objectives.Collaborate with optical hardware, mixed-signal, and software teams to optimize data-converter interfaces, clock-domain crossings, and firmware abstractions.Mentor junior engineers, facilitate design reviews, and promote best-practice design methodologies.Qualifications & Experience7+ years of direct experience in digital design for high-performance applications.Strong proficiency in CMOS design methodologies and digital circuit development.Extensive experience with FPGA prototyping and algorithm validation.Expertise in RTL design languages (SystemVerilog / Verilog / VHDL) and verification processes.Familiarity with power, performance, and area trade-offs in digital design.Excellent collaborative and communication skills for cross-functional teamwork.Demonstrated ability to lead and mentor engineering teams.
Synthesia builds AI video technology for businesses, supporting over 90% of the Fortune 100. Founded in 2017 and based in London, the company operates across Europe and the US, focusing on new ways organizations use video for communication and training. With more than $530 million raised, including a recent $200 million Series E, Synthesia is valued at $4 billion and backed by investors like Accel, NVentures, Kleiner Perkins, GV, Evantic Capital, and founders from Stripe, Datadog, Miro, and Webflow. As AI changes how people interact at work, Synthesia aims to make video content creation straightforward and accessible, helping professionals stay essential within their organizations. Role overview This mid-level digital designer position sits within the Customer Services Content Creation Team in Austin. The team develops tools that let major corporations create video content directly in their browsers. The role centers on designing corporate templates and building visual narratives that help users produce engaging video content without traditional recording equipment. Success in this position requires a proactive mindset, attention to detail, and a drive for high-quality results. What you will do Manage projects from initial concept through to delivery. Present ideas clearly using both verbal and visual communication with internal teams. Design visually impactful work while maintaining consistent brand identity for various organizations. Work collaboratively, contribute ideas, and incorporate feedback throughout the process. Monitor industry trends and bring new concepts into your design projects. Requirements At least 4 years of design experience, with a portfolio demonstrating strong work. Creative approach and ability to handle multiple tasks at once. Interest in motion graphics, branding, and typography. Proficiency with design tools including Figma, Photoshop, and Illustrator.
Full-time|Hybrid|Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Tenstorrent is at the forefront of pioneering AI technology, transforming the landscape of performance, usability, and cost-effectiveness. As AI continues to reshape the computing paradigm, our solutions are evolving to integrate advancements in software models, compilers, platforms, networking, and semiconductors. Our talented team of engineers has successfully designed a high-performance RISC-V CPU from the ground up, driven by our collective enthusiasm for AI and our commitment to creating the premier AI platform.We are currently looking for a dedicated Signal Integrity Engineer to enhance our dynamic team. The ideal candidate will possess extensive experience in designing high-speed interconnects, breakout design, material trade-offs, and verification processes. A background in electrical engineering, electronics, or related fields is essential, along with a genuine passion for high-speed technologies.This position offers a hybrid work model based in Santa Clara, CA, Austin, TX, or Toronto, ON.We encourage candidates from diverse experience levels to apply. During the interview process, applicants will be evaluated for the appropriate level, and compensation will reflect this level, which may vary from the one stated in this listing.
Location: Hybrid. Staff may need to attend quarterly meetings at the nearest office, typically 1-4 times per year. Main office: Austin, Texas, United States. About Aravo Solutions Aravo Solutions, Inc. provides third-party risk management (TPRM), ESG, and vendor lifecycle management software to Global 2000 enterprises. The platform uses intelligent automation to help organizations manage risk across complex, global networks. With millions of users in over 195 countries, Aravo integrates AI directly into workflows to help companies understand and respond to risk, supporting business resilience and reputation. Role Overview The Staff Software Engineer - API and AI Integrations will serve as a technical anchor for the Integration & Platform team. This role focuses on backend architecture and development, setting and upholding engineering standards, and leading modernization efforts for the Java/Spring Boot ecosystem. The goal: move toward cloud-native, AI-enabled workflows that support Aravo’s Intelligence-First™ approach to risk management. What You Will Do Architect and advance core backend services for the Integration & Platform group. Establish and maintain engineering standards across the team. Drive modernization of Java/Spring Boot systems, with a focus on cloud-native and AI-integrated solutions. Collaborate with industry experts and cross-functional teams to shape technical direction. What We’re Looking For Deep experience with Java and Spring Boot in distributed systems. Strong background in cloud infrastructure and API/integration design. Demonstrated leadership in technical teams; able to influence engineering direction. Clear, effective communication and strong problem-solving skills. Comfort working in a collaborative, evolving environment. Why Join Aravo? Work on AI-driven solutions in the TPRM space. Collaborate with a team that treats AI as a partner, not a replacement. Contribute to technology that directly impacts global risk management and business resilience.
Apptronik seeks a Staff Hardware Integration Engineer based in Austin, TX. This position centers on uniting hardware systems for advanced robotics. The engineer will play a key role in making sure all components operate together as intended within complex assemblies. Responsibilities Integrate hardware systems for both new and ongoing robotics projects Troubleshoot integration issues to support reliable system performance Work closely with engineering teams during development and testing phases Apply technical knowledge to help projects reach their goals Role overview This role focuses on building connections between hardware elements, ensuring smooth operation across entire robotic systems. Collaboration and hands-on problem solving are central to daily work. Requirements Experience integrating hardware systems, especially in robotics or related fields Strong troubleshooting skills for diagnosing and resolving technical issues Ability to work effectively with multidisciplinary engineering teams
Join Last Energy as a Lead Systems Integration Engineer, where you will spearhead the integration of our cutting-edge power plant systems. In this role, you will ensure seamless collaboration across various engineering disciplines, including electrical, mechanical, and structural engineering. Your expertise will be pivotal in optimizing product features and system integration, delivering reliable and efficient power solutions while upholding the highest standards of technical excellence.
Join our innovative team at Braze as a Lead Design Engineer, where you'll play a crucial role in shaping our product's design and functionality. Your expertise will guide the design process, ensuring that our solutions are not only functional but also aesthetically pleasing and user-friendly. You will collaborate with cross-functional teams, utilizing your technical skills to lead design projects from concept to completion.
Location: Austin, TX (Hybrid on-site, ~20% typical; may increase up to ~50% during exercises and field events)Clearance Requirement: U.S. Citizen with the ability to obtain a security clearance.About NODA AINODA AI is a distinguished, veteran-owned technology firm that is revolutionizing the collaboration of unmanned systems within complex, mission-critical environments. Our commitment to innovation drives the development of next-generation solutions that facilitate the autonomous orchestration of diverse unmanned systems across air, sea, land, and space, with significant applications in defense, intelligence, and commercial sectors.By joining NODA AI, you will be part of a team dedicated to advancing meaningful technology that expands the horizons of autonomy, working in an environment that values innovation, rapid iteration, and collaborative efforts.The RoleWe are looking for a proactive Field Systems Integration Engineer to act as a vital technical link between Solutions Engineering, Field Operations, and the wider engineering team. This position is crucial in ensuring that NODA systems are not only assembled and operational but also seamlessly integrated to uphold NODA’s architecture, mission workflows, communication protocols, and internal testing objectives.In this hands-on role, you will work with radios, onboard computing systems, payloads, vehicle integrations, and onboard autonomy systems (PX4/ArduPilot) across deployed unmanned platforms. You will guide Field Operations in building, configuring, and executing systems in accordance with NODA’s technical vision, while also identifying and troubleshooting issues through structured debugging, log analysis, and comprehensive system reasoning. A solid understanding of autopilot configuration, failsafe behavior, MAVLink communication, and autonomy stack integration is required, alongside the ability to utilize code, configurations, and scripts to enhance the repeatability and reliability of field integration workflows.
Join Aravo Solutions as a Senior Automation Engineer (QA/Integrations) in vibrant Austin, Texas. In this role, you will be pivotal in enhancing our automation frameworks and integration processes, ensuring the highest quality in our software delivery.
Full-time|$158K/yr - $243K/yr|On-site|Austin, Texas, United States; Fremont, California, United States
Neuralink develops devices that connect directly with the human brain. The company’s technology focuses on restoring movement for people with paralysis, improving vision for those with impairments, and changing how people interact with digital systems. The Brain Interfaces Hardware Department leads the design of chip architecture and silicon systems for neural recording and stimulation. This group works on system-on-chip (SoC) solutions that support high-bandwidth brain-machine interfaces. Team members include engineers committed to advancing neurotechnology. Role overview The Physical Design and Verification Engineer manages the full physical design flow from RTL to GDSII. This includes: Synthesis Placement Clock tree synthesis Detailed routing Optimization Physical signoff verification Locations This position is based in Austin, Texas or Fremont, California.
Full-time|On-site|Austin, TX, United States; Boulder, Colorado, United States; Chicago, Illinois, United States; London, United Kingdom; New York, NY, United States; Seattle, Washington, United States
Wehrtyou is seeking a Physical Design Engineer to develop advanced physical layouts for semiconductor products. This role directly shapes hardware design and implementation, balancing high performance with manufacturability. Key responsibilities Create and refine physical layouts for semiconductor devices Collaborate with multidisciplinary teams to optimize designs Ensure layouts comply with industry standards for quality and reliability Support product delivery from initial concept through manufacturing Locations Austin, TX, United States Boulder, Colorado, United States Chicago, Illinois, United States London, United Kingdom New York, NY, United States Seattle, Washington, United States Work culture Engineers at Wehrtyou contribute to projects that help shape the future of technology. The team emphasizes collaboration, technical growth, and practical problem-solving.
About Etched Etched builds the first AI inference system tailored for transformers, delivering over 10x higher performance with lower cost and latency than conventional approaches. The company’s ASIC technology powers advanced products, from real-time video generation to sophisticated reasoning agents. Backed by leading investors and staffed by top engineers, Etched is focused on reshaping the infrastructure that supports the fast-moving AI sector. Role Overview The Senior Physical Design Engineer will play a central role in block-level implementation and verification. This position focuses on driving timing closure and optimizing power, performance, and area (PPA). The engineer will oversee third-party design partners and help refine internal workflows to accelerate design cycles. What You Will Do Develop a deep understanding of physical design challenges and solutions Run physical design flows to achieve block closure, improve ASIC infrastructure, and automate design steps Work closely with RTL designers, offering feedback to improve PPA Create dashboards to monitor project convergence in physical design Refine tool flows and collaborate with EDA vendors to adopt new technologies Take responsibility for achieving block-level closure Manage relationships with third-party physical design service providers Who We’re Looking For 5 to 10+ years of hands-on experience in physical design Strong background in tools, flows, and methodologies from RTL synthesis through GDSII sign-off Proven track record in back-end design and timing closure on advanced nodes (5nm and below) Familiarity with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler) automated RTL-to-GDSII flows Experience using sign-off tools such as PrimeTime, Tempus, Voltus, and similar Knowledge of UPF-based low power design, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis Creative thinker with strong problem-solving skills Location Austin
Full-time|$102K/yr - $244K/yr|On-site|Austin, Texas, United States
About Neuralink:At Neuralink, we are pioneering technology that establishes a bi-directional interface with the human brain. Our innovative devices aim to restore movement to those who are paralyzed, restore sight to the visually impaired, and transform the way humans engage with their digital environments.Team Overview:The EPC team plays a crucial role in all engineering, procurement, and construction activities, from developing new greenfield sites to enhancing existing facilities. We collaborate with cross-functional teams to identify and address their present and future requirements, creating tailored environments that foster the growth of our research and engineering initiatives.We seek dynamic individuals who thrive in fast-paced settings, advocate for teamwork and transparent communication, and possess a genuine enthusiasm for design and construction. This role demands exceptional organizational skills, a consistent track record of high-performance, a passion for interdisciplinary projects, and an eagerness to contribute to Neuralink's mission!Key Responsibilities:As a senior mechanical engineer on our design team, you will be instrumental in conceptualizing and optimizing facilities. You will translate innovative concepts into detailed designs for HVAC, hydronic (chilled and heating water), plumbing, and process utility systems that seamlessly integrate with our facilities and manufacturing processes. Your work will encompass new construction as well as modifications to existing infrastructures. This position will support construction, facility operations, and various cross-functional departments to ensure that infrastructure systems are expertly designed to support all company activities.Develop conceptual designs and finalize designs for diverse project types including offices, laboratories, clean rooms, manufacturing facilities, warehouses, data centers, vivariums, and animal care facilities.Create high-quality Building Information Modeling (BIM) (REVIT) models, engineering drawings, and one-line diagrams for all mechanical, plumbing, and process systems.Design HVAC, hydronic, plumbing, and process utility systems that comply with codes, remain cost-effective, and satisfy quality and scheduling requirements.Prepare comprehensive construction drawing packages, including details, specifications, and operational sequences.Generate Building Automation System (BAS) and Direct Digital Control (DDC) control documents, scopes of work, and vendor quotes.Develop specifications, data sheets, and procurement requests for proposals (RFPs) for long-lead mechanical and plumbing equipment.Ensure all designs adhere to relevant codes and standards for optimal performance.
Full-time|On-site|Austin, TX, United States; Boulder, Colorado, United States; Chicago, Illinois, United States; London, United Kingdom; New York, NY, United States
wehrtyou is hiring a Design Verification Engineer to help ensure the quality and reliability of new designs. This position is available in Austin, Boulder, Chicago, London, or New York. Role overview This role centers on verifying the functionality of complex hardware or system designs. The Design Verification Engineer works closely with colleagues from different teams to review requirements, identify potential issues, and confirm that products meet high quality standards. What you will do Develop and maintain verification plans for new and existing designs Create and execute test cases to validate product functionality Collaborate with engineering and product teams to address issues and improve processes Location Positions are available in Austin, TX; Boulder, CO; Chicago, IL; London, UK; and New York, NY.
Join Base PowerBase Power is revolutionizing the energy sector in America. We are committed to transforming the outdated, centralized electrical grid into a robust and sustainable system through our expansive network of distributed batteries. Our diverse team of engineers, operators, and creative thinkers is dedicated to tackling the intricate challenges facing modern civilization.Role OverviewAs a Hardware Integration Engineer, you will be pivotal in the design and integration of cutting-edge residential battery storage systems, inverters, and microgrid interconnect devices (MID). Your expertise in electrical engineering and hands-on experience with sophisticated energy storage hardware will help us create safe, reliable, and scalable hardware solutions that empower homes and communities.Key ResponsibilitiesDesign and integrate battery management systems (BMS), inverters, and MID hardware specifically for residential energy applications.Develop and maintain comprehensive system architecture and electrical schematics for multi-component energy systems.Conduct rigorous testing, validation, and troubleshooting of integrated hardware systems to ensure performance and reliability.Collaborate with software teams to facilitate seamless integration of hardware and software, including control algorithm development.Assist in navigating regulatory compliance and product certification processes to uphold industry standards.
Join our innovative team as an ASIC Physical Design Engineer in the vibrant city of Austin, Texas. In this role, you will leverage your expertise to design and implement cutting-edge ASIC physical layouts, ensuring high performance and reliability.As a key member of our engineering department, you'll collaborate with cross-functional teams to drive projects from conception through to completion, all while adhering to strict timelines and quality standards.
Join Stanley Consultants, a prestigious global consulting engineering firm dedicated to fostering a culture of integrity, innovation, and excellence. With over a century of experience in the energy, federal government, transportation, and water sectors, we tackle complex engineering challenges to create a sustainable and interconnected world. As an employee-owned organization, we prioritize our people and value their contributions to our success. We are seeking a skilled Mechanical Engineer specializing in facilities design to enhance our team in Austin, TX. You will engage in the design of mechanical systems, including HVAC, plumbing, steam, hydronic heating and cooling, and compressed air systems. Your role will also involve writing sequences of operations for building automation systems and collaborating with multi-disciplinary teams on various projects, ranging from renovations to new constructions.
Location: Austin, TX (Hybrid: 2 to 3 days onsite per week) Role overview The Senior Staff Systems Design Engineer at Weedmaps leads the transformation of the company’s design system into a scalable, production-ready foundation. This position connects Design, Engineering, and AI tooling, focusing on building, operationalizing, and scaling the system for all user interface surfaces. The role balances rapid development with high standards for usability and craftsmanship, ensuring alignment with engineering architecture and consistency across applications. Collaboration is central, working with Engineering (CI/CD, tokens, tooling), Creative (brand cohesion and evolution), and Product Design (development and iteration) to drive adoption and improve the product experience. What you will do Define and iterate on a multi-platform system for web and mobile, grounded in solid architecture, governance, and scalability principles. Own the system roadmap, setting priorities based on product needs, adoption gaps, and system performance. Collaborate with Design and Creative leaders to ensure quality craftsmanship, modern interaction patterns, and alignment with evolving brand standards. Design and implement core system components, including intuitive, flexible, and scalable APIs, variants, and composition patterns. Maintain high standards for visual accuracy, fidelity, accessibility (using React Aria), and interaction quality, including motion and state management. Continuously improve components based on real product usage and edge case scenarios. Implement automated quality systems such as visual regression testing, and conduct ongoing audits to uphold usability and craftsmanship, taking a cross-functional approach to quality. Lead migration of legacy user interfaces, ensuring smooth integration of key product surfaces (like CTAs and checkout flows) powered by the design system to increase adoption across the platform. Enhance Developer Experience by creating well-structured, intuitive component APIs that balance flexibility and simplicity. Establish a reliable tool-to-code pipeline (Figma, Claude, Builder, and others) to keep design artifacts and production components in sync and minimize drift. Partner with Engineering on architectural decisions (CI/CD, token systems, distribution infrastructure) and support enforcement mechanisms such as linting and token constraints to maintain system integrity. Introduce and standardize AI-assisted workflows, structure components for AI-friendly generation, and integrate tools (Builder.io, Gemini, and others) to improve consistency. Mentor designers and engineers, sharing best practices and guiding system usage to foster a strong, knowledgeable community.
Apr 21, 2026
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