About the job
Join d-Matrix, where we are dedicated to unlocking the transformative potential of generative AI technology. At the cutting edge of both software and hardware innovation, we're redefining possibilities. Our culture emphasizes respect and collaboration, fostering an environment where humility and straightforward communication thrive. We encourage an inclusive team dynamic that embraces diverse perspectives, leading to enhanced solutions. If you're passionate about tackling challenges and driven by results, come explore your playground with us. Together, we can shape the future of AI.
Location:
This position is hybrid, with 3 days a week at our Santa Clara, CA headquarters.
Key Responsibilities:
• Design and validate FPGA-based solutions for managing d-Matrix AI inference accelerators.
• Specify FPGA microarchitecture in collaboration with stakeholders to meet project specifications.
• Develop robust dual boot architecture for multi-core and multi-chiplet systems.
• Create and implement hardware/software modules for platform power management, health monitoring, and telemetry data collection.
• Interact with host server BMC using SMBus mailbox, implementing management protocols like MCTP, PLDM, and SPDM.
• Integrate RISC-V CPU cores and associated firmware into FPGA architectures.
• Develop the eFuse controller within the FPGA.
• Design and integrate a secure boot solution compliant with NIST standards to enable secure booting for d-Matrix accelerator chiplets.
• Collaborate with cross-functional teams to facilitate seamless integration of hardware and software, aiding in inference accelerator hardware bring-up and troubleshooting.
• Write Python scripts for hardware testing and automation.
Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's degree preferred. A minimum of 12 years of experience in FPGA design and verification is required.
• Proficient in hardware design using Hardware Description Languages (HDLs) such as Verilog or VHDL.
• Knowledgeable about RISC-V architecture and embedded systems development.
• Familiar with hardware-software integration concepts.
• Experience in scripting languages for automation and testing.
