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System Validation Engineer - NCG 2026

Astera LabsSan Jose, CA
On-site Full-time
Position filled

Experience Level

Entry Level

Qualifications

Experience in post-silicon validation or bring-up of connectivity IP blocksProficient in signal integrity analysis and eye diagram measurements

About the role

Astera Labs, based in San Jose, CA, develops connectivity solutions for AI and cloud infrastructure. The company works closely with hyperscalers and technology partners to deliver products that help organizations scale and optimize AI workloads. Astera Labs' Intelligent Connectivity Platform integrates technologies like CXL, Ethernet, NVLink, PCIe, and UALink with the COSMOS software suite to support end-to-end connectivity in advanced systems. Both standards-based and custom solutions are available, allowing customers to tailor architectures for their infrastructure needs.

Role overview

The System Validation Engineer (NCG 2026) will focus on validating high-speed interconnects and AI fabrics in custom silicon. This role involves working with advanced technologies such as PCIe Gen5/Gen6, CXL, and memory-semantic fabrics.

What you will do

  • Participate in chip bring-up for new silicon products
  • Debug and validate system-level functionality across multiple connectivity standards
  • Work with technologies including PCIe Gen5/Gen6, CXL, and memory-semantic fabrics

Requirements

  • Interest in system validation for high-speed interconnects and AI infrastructure
  • Familiarity with custom silicon or semiconductor technologies is helpful
  • Located in or able to work from San Jose, CA

To learn more about Astera Labs, visit www.asteralabs.com.

About Astera Labs

Astera Labs is a rapidly growing semiconductor firm dedicated to redefining connectivity for AI and cloud infrastructures, focusing on intelligent solutions that facilitate seamless data movement across various computing components.

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